1. Field of the Invention
The present invention relates to the fabrication of integrated circuits. More particularly, the present invention relates to improved techniques for increasing circuit density and/or reducing substrate damage in an integrated circuit employing fusible links.
2. Description of Related Art
Semiconductor integrated circuits (IC) and their manufacturing techniques are well known. In a typical integrated circuit, a large number of semiconductor devices may be fabricated on a silicon substrate. To achieve the desired functionality, a plurality of conductors are typically provided to couple selected devices together. In some integrated circuits, conductive links are coupled to fuses, which may be cut or blown after fabrication using lasers or electrical power. In a dynamic random access memory (DRAM) circuit, for example, fuses may be employed during manufacturing to protect some of the transistors"" gate stacks from an inadvertent built-up of charges. Once fabrication of the IC is substantially complete, the fuses may be blown or cut to permit the DRAM circuit to function as if the protective current paths never existed. Alternatively, the fuse links may be used to re-route the conductive lines and hence modify the functionality of the circuit.
Laser fusible links are generally metal lines that can be explosively fused open by application of laser energy. The laser energy causes a portion of the link material to vaporize and a portion to melt. Typically, the fusible link is thin and is made of aluminum or polysilicon or it may be made of the same metals as the chip conductors. In operation, a short pulse of laser energy in predetermined arcs (spot) is impinged upon the link. Electrically fusible links comprise metal lines that can be fused open by application of excess electrical current through the fuse which induces a portion of the link material to vaporize, melt or otherwise be caused to form an electrical discontinuity or xe2x80x9copenxe2x80x9d. Typically, the electrically fusible link is formed of a metallic conductor (such as aluminum) or a polysilicon. In operation, a short pulse of electrical power is applied to induce the fuse open.
Since every link is not necessarily blown, it is important to ensure that adjacent fuses are not blown by reflected light or thermal energy. Two methods are currently used to ensure that only the desired fuses are blown and that adjacent fuses are not inadvertently blown. The first method simply spaces the fuses two or three spot diameters apart. The second method builds metal walls between the adjacent fuses. Both those methods result in large fuse pitches and significant use of chip area. In cases where the fusible links are built from the same material as the chip conductors; become thicker; are made of composite layers including layers of refractory metals (tungsten and various silicides); or are comprised of highly reflective metals (copper/aluminum), blowing the fuses with lasers becomes more difficult. The increasing speed requirements of logic chips are the driving force behind these fusible link materials. More commonly, fuses may be employed to set the enable bit and the address bit of a redundant array element in a DRAM circuit.
It has been found that the use of a laser beam to set, cut or blow a fuse link may render the area under the fuse link or adjacent fusible links vulnerable to laser-induced damage, mainly due to the absorption of laser energy during the fuse setting operation. Because of the possibility of laser-induced damage, the areas underlying the fuse links are typically devoid of semiconductor devices (e.g., transistors) and the fuses are spaced far apart in conventional systems. Even when there are no active devices beneath the fusible link or other closely spaced fusible links, the substrate itself may also experience some degree of laser-induced damage. This is because silicon, which is the typical substrate material, absorbs the laser energy readily, particularly when short wavelength lasers are employed. For this reason, lasers having relatively long wavelengths such as infrared lasers have been employed in conventional systems for the fuse setting operation.
Even though infrared lasers are helpful in minimizing laser-induced damage to the underlying substrate, the use of lasers having relatively long wavelengths involves certain undesirable compromises. By way of example, the relatively long wavelength of the infrared laser forms a relatively large spot on the substrate during the fuse setting operation, which limits how closely the fuse links can be packed next to one another. For infrared lasers having a wavelength of, for example, about 1 micron, the spot created on the substrate may be two times the wavelength of about 2 to 2.5 microns wide. The diameter of the laser spot places a lower limit on the minimum fuse pitch or spacing between adjacent fuse links. If the fuses are placed too closely together for a given laser wavelength, an adjacent fuse link may be inadvertently blown or cut, rendering the IC defective.
Using a laser with a shorter wavelength would reduce the diameter of the laser spot and concomitantly the minimum fuse pitch. However, a shorter wavelength laser substantially increases the likelihood of underlying substrate damage in conventional systems since the silicon substrate absorbs laser energy from shorter wavelength lasers more readily. If a shorter wavelength laser is employed to set the fuse links of the conventional system""s fuse array, excessive substrate damage in area may result, possibly leading to integrated circuit defects and failure.
There is a need for improved techniques for fabricating integrated circuits having laser and or electrically fusible links. More particularly, there is a conventional need for improved laser and/or electrical fuse link structures and methods therefor, which reduce the amount of damage caused when the fuse element blows.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide an improved method for fabricating integrated circuits having laser fusible links.
It is another object of the present invention to provide an improved laser fuse link structure which reduces the amount of damage caused when the fuse element blows.
A further object of the invention is to provide an improved fuse link structure and method of making such a structure which permits the fuses to have smaller spacing and pitch.
It is yet another object of the present invention to provide an improved fuse link structure and method of making such a structure which permits the fuses to be blown with short or long wavelength lasers.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
The above and other objects and advantages, which will be apparent to one of skill in the art, are achieved in the present invention which is directed to, in a first aspect, an electrical fuse structure comprising a semiconductor substrate; at least one electrically insulating layer over the semiconductor substrate having a portion thereof containing electrical wiring and another, adjacent portion thereof substantially free of electrical wiring; optionally, a further electrically insulating layer over the at least one electrically insulating layer. The at least one electrically insulating layer and the optional further electrically insulating layer have a depression formed over the portion of the at least one electrically insulating layer substantially free of electrical wiring, with the depression having a lower surface level than an adjacent portion of the electrically insulating layer. The fuse structure also includes a fuse insulator disposed over the depression and a fuse over the fuse insulator.
Preferably, the fuse insulator is disposed only in the depression to elevate the fuse to the same level as the adjacent portion of the electrically insulating layer. The fuse structure may have a single layer or comprise alternating layers having different degrees of reflectivity to a laser beam, such as alternating layers of silicon oxide and silicon nitride. The preferred fuse structure comprises an electrically and thermally resistive fuse insulator in the depression, such that the fuse insulator substantially prevents heat of an energy beam directed at the fuse from being transmitted to the semiconductor substrate. More preferably, the fuse formed has a width less that that of the fuse insulator. The fuse structure may further include additional wiring over the electrical insulating layer at the same level as the fuse.
In a related aspect, the present invention provides an electrical fuse structure comprising a semiconductor substrate; a first electrically insulating layer over the semiconductor substrate having a portion thereof containing electrical wiring and another, adjacent portion thereof substantially free of electrical wiring; and a second electrically insulating layer over the first electrically insulating layer. The first electrically insulating layer and the second electrically insulating layer have a depression formed over the portion of the at least one electrically insulating layer substantially free of electrical wiring, with the depression having a lower surface level than an adjacent portion of the electrically insulating layer. An electrically and thermally resistive fuse insulator is disposed over the depression in the second electrically insulating layer, where the fuse insulator has a width and having a surface level which is substantially the same as that of the adjacent surface level of the second electrically insulating layer. A fuse is disposed over the fuse insulator, with the fuse having a width less that that of the fuse insulator. The fuse insulator may comprise alternating layers having different degrees of reflectivity to a laser beam, such as alternating layers of silicon oxide and silicon nitride.
In yet another aspect, the present invention relates to a method of forming an electrical fuse on a semiconductor structure comprising providing a semiconductor substrate; depositing on the semiconductor substrate at least one electrically insulating layer having a portion thereof containing electrical wiring and another, adjacent portion thereof substantially free of electrical wiring; and polishing the at least one electrically insulating layer, e.g., by chemical mechanical polishing, such that there is formed over the portion thereof substantially free of electrical wiring a depression having a lower surface level than the adjacent portion thereof containing electrical wiring. Optionally, there is deposited over the at least one electrically insulating layer a further electrically insulating layer. The method includes polishing the further electrically insulating layer such that there is formed therein over the portion of the at least one electrically insulating layer substantially free of electrical wiring a depression having a lower surface level than an adjacent portion of the further electrically insulating layer. The method then includes depositing a fuse insulator in the depression over the portion of the at least one electrically insulating layer substantially free of electrical wiring, with the fuse insulator having a surface level which is substantially the same as the adjacent surface level of the electrically insulating layer; and forming a fuse over the fuse insulator.
Preferably, the fuse insulator is electrically and thermally resistive and is deposited only in the depression and the method comprises depositing alternating layers, such as layers of silicon oxide and silicon nitride, having different degrees of reflectivity to a laser beam. The method may further including directing an energy beam at, and blowing, the fuse. The fuse formed preferably has a width less that that of the fuse insulator, such that when directing an energy beam having a width greater than the fuse at the fuse, a portion of the energy beam blows the fuse and another portion of the energy beam is reflected by the fuse insulator. The fuse insulator substantially prevents heat from being transmitted to the semiconductor substrate. The method may further include depositing additional wiring over an electrical insulating layer at the same level as the fuse.
A further aspect of the present invention provides a method of forming an electrical fuse on a semiconductor structure comprising providing a semiconductor substrate; depositing on the semiconductor substrate a first electrically insulating layer having a portion thereof containing electrical wiring and another, adjacent portion thereof substantially free of electrical wiring; depositing over the electrically insulating layer a second electrically insulating layer; and chemical mechanical polishing the second electrically insulating layer such that there is formed therein over the portion of the first electrically insulating layer substantially free of electrical wiring a depression having a lower surface level than an adjacent portion of the second electrically insulating layer over the portion of the first electrically insulating layer containing electrical wiring. The method then includes depositing an electrically and thermally resistive fuse insulator in the depression of the second electrically insulating layer, the fuse insulator having a width and having a surface level which is substantially the same as the adjacent surface level of the second electrically insulating layer; forming a fuse over the fuse insulator, the fuse having a width less that that of the fuse insulator; and directing a laser beam at, and blowing, the fuse.
Preferably, depositing the fuse insulator comprises depositing alternating layers having different degrees of reflectivity to the laser beam. The method may further include directing a laser beam having a width greater than the fuse at the fuse such that a portion of the laser beam blows the fuse and another portion of the laser beam is reflected by the fuse insulator. The fuse insulator substantially prevents heat from being transmitted to the semiconductor substrate. Additional wiring may be deposited over the adjacent surface level of the second electrical insulating layer at the same level as the fuse.